1. Field of the Invention
The invention relates to an integrated circuit having a hydrogen barrier layer to protect elements containing metal oxide materials from degradation in integrated processes utilizing or producing hydrogen, and in particular to specific materials for use in such barrier layers, specific structures for such barrier layers, and processes for making such materials and structures.
2. Statement of the Problem
Metal oxides have been used in integrated circuits, particularly memories. For example, ferroelectric compounds possess favorable characteristics for use in nonvolatile integrated circuit memories. See U.S. Pat. No. 5,046,043 issued Sep. 3, 1991 to Miller et al. A ferroelectric device, such as a capacitor, is useful as a nonvolatile memory when it possesses desired electronic characteristics, such as high residual polarization, good coercive field, high fatigue resistance, and low leakage current. Lead-containing ABO3-type ferroelectric oxides such as PZT (lead titanate zirconate) and PLZT (lanthanum lead titanate zirconate) have been studied for practical use in integrated circuits. Layered superlattice material oxides have also been studied for use in integrated circuits. See U.S. Pat. No. 5,434,102 issued Jul. 18, 1995 to Watanabe et al. Layered superlattice material compounds exhibit characteristics in ferroelectric memories that are orders of magnitude superior to those of PZT and PLZT compounds and also exhibit dielectric constants that make them useful for DRAMS. See, for example, U.S. Pat. No. 5,519,234 issued May 21,1996 to Paz de Araujo et al. Integrated circuit devices containing ferroelectric elements are currently being manufactured. Nevertheless, the persistent problem of hydrogen degradation during the manufacturing process hinders the economical production in commercial quantities of ferroelectric memories and other IC devices using the layered superlattice material and other metal oxide compounds with the desired electronic characteristics.
A typical ferroelectric memory device in an integrated circuit contains a semiconductor substrate and a metal-oxide semiconductor field-effect transistor (MOSFET) in electrical contact with a ferroelectric device, usually a ferroelectric capacitor. A ferroelectric capacitor typically contains a thin film containing ferroelectric metal oxide located between a first, bottom electrode and a second, top electrode, the electrodes typically containing platinum. During manufacture of the circuit, the MOSFET is, subjected to conditions causing defects in the silicon substrate. For example, the CMOS/MOSFET manufacturing process usually includes high energy steps, such as ion-mill etching and plasma etching. Defects also arise during heat treatment for crystallization of the layered superlattice material at relatively high temperatures, often in the range of from 500° C. to 900° C. As a result, numerous defects are generated in the single crystal structure of the semiconductor silicon substrate, leading to deterioration in the electronic characteristics of the MOSFET.
To restore the silicon properties of the CMOS/MOSFET, the manufacturing process typically includes a hydrogen annealing step in which defects, such as dangling bonds, are eliminated by utilizing the reducing property of hydrogen. Various techniques have been developed to effect the hydrogen annealing, such as a forming-gas anneal (“FGA”). Conventionally, FGA treatments are conducted under ambient conditions in a H2—N2 gas mixture between 350° C. and 550° C., typically around 400° C. to 450° C., for a time period of about 30 minutes. In addition, the CMOS/MOSFET manufacturing process requires other fabrication steps that expose the integrated circuit to hydrogen, often at elevated temperatures, such as hydrogen-rich plasma CVD processes for depositing metals and dielectrics, growth of silicon dioxide from silane or TEOS sources, and etching processes using hydrogen and hydrogen plasma. During processes that involve hydrogen, the hydrogen diffuses principally through the top electrode to the layered superlattice material, but also from the side edges of the capacitor, and reduces the oxides contained in the ferroelectric material. The absorbed hydrogen also metallizes the surface of the layered superlattice material by reducing metal oxides. As a result of these effects, the electronic properties of the capacitor are degraded. After the forming-gas anneal (FGA), the remnant polarization of the ferroelectrics is very low and no longer suitable for storing information or the dielectric properties are degraded. An increase in leakage currents also results. In addition, the adhesivity of the layered superlattice material to the upper electrode is lowered by the chemical change taking place at the interface. Alternatively, the upper electrode is pushed up by the oxygen gas, water, and other products of the oxidation-reduction reactions taking place. Thus, peeling is likely to take place at the interface between the top electrode and the layered superlattice material. In addition, hydrogen also can reach the lower electrode, leading to internal stresses that cause the capacitor to peel off its substrate. These problems are acute in ferroelectric memories containing layered superlattice material compounds because these oxide compounds are particularly complex and prone to degradation by hydrogen-reduction.
A related problem encountered in the fabrication of ferroelectric and other metal oxide devices is the stress arising in and between the different circuit layers as a result of the manufacturing processes. The products of the hydrogen reduction reactions cause an increase in the total volume of the metal oxide element. As a result, the material exerts an upward pressure on the layers above it.
Several methods have been reported in the art to inhibit or reverse hydrogen degradation of desired electronic properties in ferroelectric oxide materials. Oxygen-recovery annealing at high temperature (800° C.) for about one hour results in virtually complete recovery of the ferroelectric properties degraded by hydrogen treatments; but the high temperature oxygen anneal itself may generate defects in silicon crystalline structure, and it may offset somewhat the positive effects of any prior forming-gas anneal on the CMOS characteristics. Also, if hydrogen reactions have caused structural damage to the ferroelectric device, such as peeling, then a recovery anneal is not able to effectively reverse the damage.
To reduce the detrimental effects of the hydrogen heat treatment and protect the ferroelectric metal oxide element, the prior art also teaches the application of hydrogen barrier layers to inhibit the diffusion of hydrogen into the ferroelectric material. The barrier layer is typically located over the ferroelectric element, but it can also be located below and laterally to the sides of the element.
Hydrogen degradation is also a problem in complex metal oxides used in nonferroelectric, high-dielectric constant applications in integrated circuits. Hydrogen reactions cause structural damage, as described above for ferroelectric oxides, and cause degradation of dielectric properties. Examples of metal oxides subject to hydrogen degradation include barium strontium titanate (“BST”), barium strontium niobate (“BSN”), certain ABO3-type perovskites, and certain layered superlattice materials, such as strontium bismuth tantalate (“SBT”). Hydrogen barrier layers are, therefore, also used to protect nonferroelectric, high-dielectric constant metal oxides.
A problem associated with utilizing a recovery anneal of an integrated circuit substrate with a hydrogen barrier layer is that the high temperatures employed during the recovery anneal can cause grain growth in the hydrogen barrier layer, thereby changing the amorphous nature and electrical properties of the hydrogen barrier layer. A further problem is that the use of a hydrogen barrier layer in connection with a metal layer, such as aluminum, is that the metal layer cannot withstand temperatures greater than 450° C.
It is known in the art to use a hydrogen barrier layer comprising a nitride of aluminum, silicon or titanium, that is, AlN, Si3N4, or Ti3N4. Typically, hydrogen barrier layers known in the art are not completely effective in preventing hydrogen diffusion and the resulting hydrogen degradation of metal oxides. Thus, even when a diffusion barrier is used, it is not uncommon for structural damage to arise in the ferroelectric or dielectric device and for hydrogen to reach the metal oxide layer and degrade the desired ferroelectric or dielectric properties of the metal oxide material.
Therefore, it would be useful to have new materials different from those known in the art to obtain the benefits of a hydrogen barrier layer in protecting ferroelectric and dielectric oxide materials, in particular, ferroelectric layered superlattice materials, from hydrogen degradation.
3. Solution to the Problem p The invention solves the above problem by providing a hydrogen diffusion barrier comprising a material selected from the group consisting of strontium tantalate, tantalum pent-oxide, bismuth tantalate, titanium oxide, tungsten oxide, zirconium oxide and aluminum oxide. The invention also solves the above problem by providing a hydrogen barrier layer that is amorphous. When subjected to the high temperature recovery anneals, these hydrogen barrier layers do not increase in grain growth. This lack of grain growth decreases the manufacturing defects caused by expanding layers within an integrated circuit. In addition, these hydrogen barrier layers can easily be obtained at low deposition temperatures (˜450° C. or less) by a deposition technique like MOCVD. Therefore, the hydrogen barrier layer can be deposited on top of the first metal layer without compromising the metallization. Because these hydrogen barrier layers are amorphous and dense even after heating to temperatures of up to 650° C., they retain their electrical and hydrogen barrier properties throughout conventional integrated circuit processing steps. The invention also solves the above problem by providing a multilayer hydrogen barrier layer comprising two different materials. For example, one material may be the amorphous form of a chemical compound while the other material is a crystalline form of the same chemical compound.
The invention provides an integrated circuit comprising: a thin film of metal oxide material; and a hydrogen barrier layer located to inhibit the diffusion of hydrogen to the metal oxide material, the hydrogen barrier layer comprising a material selected from the group consisting of: strontium tantalate, bismuth tantalate, tantalum oxide, titanium oxide, zirconium oxide and aluminum oxide. Preferably, the metal oxide comprises a perovskite. Preferably, the metal oxide comprises a material with a dielectric constant of 20 or more. Preferably, the metal oxide comprises a ferroelectric material. Preferably, the metal oxide comprises a layered superlattice material. Preferably, the layered superlattice material comprises one or more of the following chemical elements: strontium, calcium, barium, bismuth, lead, yttrium, scandium, lanthanum, antimony, chromium, thallium, titanium, tantalum, hafnium, tungsten, niobium, zirconium, oxygen, fluorine and chlorine. Preferably, the layered superlattice material comprises a material selected from the group comprising strontium bismuth tantalate, strontium bismuth niobate, and solid solutions thereof. Preferably, the layered superlattice material comprises strontium, bismuth, tantalum and niobium in relative molar proportions corresponding to the stoichiometric formula SrBiy(Ta1−xNbx)2O9, wherein 0≦x≦1 and 2.0≦y≦2.2. Preferably, the hydrogen barrier layer material comprises a material selected from the group consisting of strontium tantalate, bismuth tantalate, and tantalum oxide. Preferably, the hydrogen barrier layer material comprises strontium tantalate. Preferably, the integrated circuit comprises a capacitor having a first electrode and a second electrode, and the metal oxide material is located between the first and second electrodes. Preferably, the capacitor is a ferroelectric capacitor and the metal oxide comprises a ferroelectric material. Preferably, the ferroelectric material comprises a layered superlattice material. Preferably, the integrated circuit comprises a field effect transistor (FET) comprising a substrate and a gate electrode, and the metal oxide material is located between the substrate and the gate electrode. Preferably, the FET is a ferroelectric FET and the metal oxide material comprises a ferroelectric material. Preferably, the ferroelectric material comprises a layered superlattice material. Preferably, the hydrogen barrier layer is between 30 nanometers and 100 nanometers (nm) thick. More preferably, the hydrogen barrier layer is between 70 nm and 90 nm thick. Preferably, the hydrogen barrier layer material is amorphous. Preferably, the integrated circuit includes a semiconducting substrate and the metal oxide material is located between the hydrogen barrier layer and the substrate. Preferably, the integrated circuit includes a wiring layer and the integrated circuit further comprises a second hydrogen barrier layer located above the wiring layer. Preferably, the integrated circuit further includes a substrate and a wiring layer, the metal oxide material is located between the wiring layer and the substrate, and the hydrogen barrier layer is located above the wiring layer.
In another aspect, the invention provides an integrated circuit comprising a thin film of metal oxide material; a hydrogen barrier layer located to inhibit the diffusion of hydrogen to the metal oxide material, the hydrogen barrier layer comprising an amorphous material; and a capping layer completing the integrated circuit. Preferably, the integrated circuit comprises a capacitor having a first electrode and a second electrode, and the metal oxide material is located between the first and second electrodes. Preferably, the capacitor is a ferroelectric capacitor and the metal oxide comprises a ferroelectric material. Preferably, the ferroelectric material comprises a layered superlattice material. Preferably, the integrated circuit comprises a field effect transistor (FET) comprising a substrate and a gate electrode, and the metal oxide material is located between the substrate and the gate electrode. Preferably, the FET is a ferroelectric FET and the metal oxide material comprises a ferroelectric-material. Preferably, the ferroelectric material comprises a layered superlattice material. Preferably, the hydrogen barrier layer is between 30 nanometers and 100 nanometers (nm) thick. Preferably, the amorphous material has a crystallization temperature greater than 650° C.
In a further aspects the invention provides an integrated circuit comprising a thin film of metal oxide material; and a hydrogen barrier layer located to inhibit the diffusion of hydrogen to the metal oxide material, the hydrogen barrier layer comprising a primary hydrogen barrier layer material and a supplemental hydrogen barrier layer material, the primary hydrogen barrier layer material being different than the supplemental hydrogen barrier layer material, and wherein the primary and supplemental materials are either both conducting or both insulating. Preferably, the supplemental material is located in contact with the primary material. Preferably, the primary material and the secondary material are both conducting. Preferably, the primary material and the secondary material are both insulating. Preferably, the primary material is more compatible with the metal oxide material and is located closer to the metal oxide material. Preferably, the primary material comprises one of the chemical elements that is in the metal oxide material. Preferably, the metal oxide material is a layered superlattice material. Preferably, the primary material comprises material selected from the group consisting of: strontium tantalate, bismuth tantalate, tantalum oxide, titanium oxide, zirconium oxide, and aluminum oxide. Preferably, the supplemental material comprises a material selected from the group consisting of silicon nitride and alumina.
In still a further aspect, the invention provides a method of making an integrated circuit comprising: providing a substrate; depositing a metal oxide thin film on the substrate; forming a hydrogen barrier layer over the metal oxide thin film, the hydrogen barrier layer comprising a material selected from the group consisting of: strontium tantalate, bismuth tantalate, tantalum oxide, titanium oxide, zirconium oxide and aluminum oxide; and performing an integrated circuit fabrication process utilizing or producing hydrogen; wherein the step of forming includes locating the hydrogen barrier layer in a location where it inhibits diffusion of the hydrogen into the metal oxide thin film. Preferably, the step of forming a hydrogen barrier layer comprises metalorganic chemical vapor deposition (MOCVD) of a liquid precursor. Preferably, the MOCVD is conducted at a temperature of between 300° C. and 650° C. More preferably, the temperature is between 400° C. and 500° C. Most preferably, the temperature is 450° C. or less. Preferably, the liquid precursor includes an organic solvent which comprises at least one compound selected from the group consisting of tetrahydrofuran, methyl ethyl ketone, isopropanol, methanol, xylene, n-butyl acetate, octane, 2-methoxyethanol, toluene, diethylethane, 1,4-dioxane and hexane. Preferably, the organic solvent is toluene. Preferably, the liquid precursor comprises a double alkoxide. Preferably, the double alkoxide comprises a double ethoxide. Preferably, the ethoxide comprises strontium tantalum penta ethoxide-2-methoxy ethoxide.
In still a further aspect, the invention provides a method of making an integrated circuit comprising: providing a substrate; depositing a metal oxide thin film on the substrate; forming a hydrogen barrier layer over the metal oxide thin film using metalorganic chemical vapor deposition, (MOCVD) of a liquid precursor; and performing an integrated circuit fabrication process utilizing or producing hydrogen; wherein the step of forming includes locating the hydrogen barrier layer in a location where it inhibits diffusion of the hydrogen into the metal oxide thin film. Preferably, the MOCVD is conducted at a temperature of between 300° C. and 650° C. More preferably, the temperature is between 400° C. and 500° C. Most preferably, the temperature is 450° C. or less.
In yet another aspect, the invention provides a method of making an integrated circuit comprising: providing a substrate; depositing a metal oxide thin film on the substrate; forming a hydrogen barrier layer over the metal oxide thin film; and performing an integrated circuit fabrication process utilizing or producing hydrogen; wherein the step of forming is entirely performed at a temperature of 600° C. or less. Preferably, the step of forming is entirely performed at a temperature of 450° C. or less.
In yet a further aspect, the invention provides a method of making an integrated circuit comprising: providing a substrate; depositing a metal oxide thin film on the substrate; forming an amorphous hydrogen barrier layer over the metal oxide thin film; and performing an integrated circuit fabrication process utilizing or producing hydrogen, while the amorphous hydrogen barrier layer inhibits diffusion of the hydrogen into the metal oxide thin film. Preferably, the method further includes the step of forming a supplemental hydrogen barrier layer adjacent to the amorphous hydrogen barrier layer, wherein the supplemental hydrogen barrier layer is a different material than the amorphous hydrogen barrier layer. Preferably, the supplemental hydrogen barrier layer comprises essentially the same chemical elements as the supplemental hydrogen barrier layer except it is crystalline. Preferably, the supplemental hydrogen barrier layer is crystalline.
Numerous other features, objects and advantages of the invention will become apparent from the following description when read in conjunction with the accompanying drawings.